1. Field of the Invention
The present invention relates in general to a method to planarize a semiconductor device, and more particularly, to a method of forming an inter-layer dielectric (ILD) layer and planarizing the ILD layer by chemical mechanical polishing (CMP).
2. Description of the Related Art
Planarization is an important step in the manufacture process of a semiconductor device. FIGS. 1a-1c show a conventional planarization process of an ILD layer of a semiconductor product. An ILD layer serves to isolate either a semiconductor component and a metallic layer or more metallic layers. Referring to FIG. 1a, a semiconductor device 10 includes a plurality of gate electrodes 14 of a plurality of transistors (not shown) formed over a silicon substrate 12. A layer of undoped silicate glass 16 is deposited over gate electrodes 14 and silicon substrate 12. Undoped silicate glass layer 16 may be deposited using, for example, an atmospheric pressure chemical vapor deposition (APCVD) or sub-atmospheric chemical vapor deposition (SACVD) method. A layer of doped silicate glass layer 18, for example, phosphosilicate glass (PSG) or borophosphosilicate glass (BPSG), is deposited over undoped silicate glass layer 16.
Undoped silicate glass layer 16 and doped silicate glass layer 18 are reflowed to densify and smooth the layers. Doped silicate glass layer 18 is then planarized using a chemical mechanical polishing (CMP) process. This results in a profile shown in FIG. 1b. As shown from FIG. 1b, much of the doped silicate glass layer 18 is removed by the CMP process. Referring to FIG. 1c, an oxide layer 20 is then deposited over undoped silicate glass layer 16, to the extent any of the layer is exposed after the CMP process, and doped silicate glass layer 18. Oxide layer 20 may be deposited using, for example, a plasma enhanced chemical vapor deposition (PECVD).
U.S. Pat. No. 5,885,894 to Wu et al., which is incorporated in its entirety herein by reference, describes deposition of a layer of undoped silicate glass using a high density plasma-chemical vapor deposition (HDP-CVD) over semiconductor components. According to Wu et al., because of the characteristics of the HDP-CVD, only minor protrusions appear above the semiconductor components. After a brief CMP operation, a doped silicate glass layer, such as, PSG or BPSG, is deposited over the planarized layer using, for example, a PECVD method. Wu et al. discloses that the process thus described obviates a need to reflow the undoped and doped silicate glass layers.